Exercise01:Just read inline assembly
Ref Link Linux assemblers: A comparison of GAS and NASM
Just run GDB for remote debugging by the given script. See the GAS code if you can.
Boot ASM code explanation.
- [f000:fff0] 0xffff0: ljmp $0xf000,$0xe05b //For Real-Mode's ljmp
- jmp 0xfc85e
- %cr0 = %cr0 0x9ffffff 0 For follows
30 CD Cache disable Globally enables/disable the memory cache 29 NW Not-write through Globally enables/disable write-back caching
- set port 0x70 = 0x8f
- to enable NMI- Non Maskable Interrupt
- RTC是否為0 此例中為0 故續往下exec
- to form SS:[ESP] stack segment (PS: Code Segment: CS:[EIP])
- //for DMA controller setup section.
0xfc726: in $0x71,%al 0xfc728: in $0x92,%al 0xfc72a: or $0x2,%al 0xfc72c: out %al,$0x92
- set IDT
- set GDT
- Enable Protected Mode
- //For Protected Mode's ljmp, 換code segment 並跳至其code segment 下的0xfc74c
- The address in ram to load the boot sector into.
After Lesson:Question1: Why did not I find /boot/boot.S, /boot/main.c by GDB: info sources ; Its symbol
readelf -a obj/boot/main.o
Ans: That belongs to the boot loader placed on the #1 sector at disk. and load it into 0x7C00 to execute.
Question2: Where is the Code's symbol?
Ans: Symbol is in obj/boot/boot.out.$file obj/boot/boot.out
Question3: How to Assume It? when ljmp called show the following msg.
"The target architecture is assumed to be i386"
Ans: Not Yet.
Question4: In BIOS ROM code, when to set %cs value, so as to use for (item13/14)
Ans: %CS為0xf0000 因為是BIOS section.
Question5: How/What did MIT patch the QEMU?
Ans: Not Yet.
Question6: Why did BIOS need to switch to Protected Mode?
Ans: It wants to use the Protected Mode's functionality .
Like ljmp mem48 :In Real Address Mode or Virtual 8086 mode, the long pointer provides 16 bits for the CS register and 16 or 32 bits for the EIP register
Ref Link: bootloader - switching processor to protected mode By Stackoverflow
Bit Name Full Name Description 31 PG Paging If 1, enable paging and use the CR3 register, else disable paging 30 CD Cache disable Globally enables/disable the memory cache 29 NW Not-write through Globally enables/disable write-back caching 18 AM Alignment mask Alignment check enabled if AM set, AC flag (in EFLAGS register) set, and privilege level is 3 16 WP Write protect Determines whether the CPU can write to pages marked read-only 5 NE Numeric error Enable internal x87 floating point error reporting when set, else enables PC style x87 error detection 4 ET Extension type On the 386, it allowed to specify whether the external math coprocessor was an 80287 or 80387 3 TS Task switched Allows saving x87 task context only after x87 instruction used after task switch 2 EM Emulation If set, no x87 floating point unit present, if clear, x87 FPU present 1 MP Monitor co-processor Controls interaction of WAIT/FWAIT instructions with TS flag in CR0 0 PE Protected Mode Enable If 1, system is in protected mode, else system is in real mode